This invention relates to the fields of computer systems and data communications. More particularly, a universal DMA (Direct Memory Access) architecture is provided, capable of transferring data in either the receive or transmit direction.
Many I/O components and devices (e.g., a network interface circuit) include DMA engines for transferring data to or from host memory. Traditional DMA engines are constructed statically, and are permanently limited to transferring data in one direction only (i.e., receive or transmit).
The quantity of DMA engines for transferring data in either direction must be selected during design of the component, and once this aspect of the design is set there is no flexibility to alter the mix of receive and transmit engines. Each engine is inextricably bound to either a receive client or a transmit client and thus can only process communications in either the receive or transmit path. This severely limits the component's flexibility in that it cannot evolve or be reconfigured to more efficiently meet the needs of a particular application or set of applications.
For example, if a component is constructed with an equal number of receive and transmit DMA engines, it may adequately satisfy input/output demands for applications that have roughly equivalent input and output demands. However, this configuration will be very inefficient for an application or group of applications that receive significantly more data than they transmit (or vice versa).